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| Ordering number:ENN2890 CMOS IC LC7070N, 7070NM, 7071NM Sync and Error Detection & Correction ICs for RDS Overview The LC7070N, LC7070NM and LC7071NM CMOS Sync and Error Detection & Correction ICs are designed for use in the RDS (Radio Data System) implemented by the EBU (European Broadcasting Union). RDS is used to multiplex various data on the FM broadcast signal. When used with the SANYO LA2231 RDS Decoder IC, a simplified processor can be designed for demodulation, synchronization, and error detection & correction of the data multiplexed on the FM broadcast, significantly reducing the front-end load on the system controller. The data with adjusted sync are obtained as a serial signal output which can be passed to the system controller for processing. LC7070 x x devices are fabricated using a low-power CMOS process and are available in 18-pin plastic DIPs and MFPs with and without output pull-ups. Package Dimensions unit:mm 3007B-DIP18 [LC7070N] 24.0 18 10 7.62 6.4 1 9 (1.84) 2.54 0.5 1.2 0.51min SANYO : DIP18 Features * Group synchronization. * Selectable error detection & correction. * Serial data output. * Selectable serial data clock polarity. * Block DATA START signal output. * Low-power CMOS. * Single +5V supply. * 18-pin plastic DIP or MFP. * Optional pull-ups on serial data outputs. Type No. LC7070N LC7070NM LC7071NM Package DIP18 MFP18 MFP18 Output Pull-up No No Yes* unit:mm 3095-MFP18 [LC7070NM, LC7071NM] 18 10 12.6 0.35 1.27 1.22 *: Only 3 pins for serial data output SANYO : MFP18 Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges,or other parameters) listed in products specifications of any and all SANYO products described or contained herein. SANYO Electric Co.,Ltd. Semiconductor Company TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 71901TN (KT)/O188TA, TS No.2890-1/8 0.1 1.5 0.625 1 9 1.8max 0.15 6.35 7.6 5.4 3.3 3.85max (3.25) 0.25 LC7070N, 7070NM, 7071NM Pin Assignment Top view Specifications Absolute Maximum Ratings at Ta = 25C, VSS = 0V Parameter Maximum supply voltage Output voltage Input voltage Output voltage Peak output current Average output voltage (100ms interval) Allowable power dissipation Operating temperature Storage temperature Symbol VDD max VO1 VI1 VI2 VI3 VO2 IOP IOA IOA Pd max Topr Tstg VDD OSC2 OSC1 (See Note 1.) TEST, RES IN type 1 (See Note 2.) OUT type 1, 2 (See Note 2.) Peak current for each pin: OUT type 1, 2 (See Note 2.) Average current for each pin: OUT type 1, 2 (See Note 2.) Total current for all pins: OUT type 1, 2 (See Note 2.) Ta=-40 to +85C: DIP package Ta=-40 to +85C: MFP package (See Note 3.) Conditions Ratings -0.3 to +7.0 -0.3 to VDD+0.3 -0.3 to VDD+0.3 -0.3 to VDD+0.3 -0.3 to +15 -0.3 to +15 -2 to +20 -2 to +20 -14 to +90 28 0 200 -40 to +85 -55 to +125 Unit V V V V V V mA mA mA mW mW C C Allowable Operating Conditions at Ta = -40 to +85C, VSS = 0V, VDD = 4.5 to 6.0V, unless otherwise specified. Parameter Operating supply voltage Input high-level voltage Symbol VDD VIH1 VIH2 VIL1 VIL2 VIL3 Guaranteed constants for ceramic resonator oscillation Conditions VDD IN type 1 (See Note 2.) RES IN type 1 (See Note 2.) TEST RES See Figure 1: OSC1, OSC2 Ratings min 4.5 0.7VDD 0.8VDD VSS VSS VSS See table 1. typ max 6.0 13.5 VDD Unit V V V V V V Input low-level voltage 0.3VDD 0.3VDD 0.25VDD No.2890-2/8 LC7070N, 7070NM, 7071NM Electrical Characteristics at Ta = -40 to +85C, VSS = 0V, VDD = 4.5 to 6.0V, unless otherwise specified. Parameter Input high-level current Input low-level current Output high-level voltage (LC7071NM only) Output low-level voltage Output OFF leakage current (LC7071NM is OUT type 1 only.) Hysteresis voltage Current drain (See Note 5.) Ceramic resonator oscillation stabilization time Reset time Symbol IIH1 IIL1 IIL2 VOH1 VOH2 VOL1 VOL2 IOFF1 IOFF2 VHIS IDD tCFS tRST Conditions VIN=13.5V: IN type 1 (See Note 2.) VIN=VSS: IN type 1 (See Note 2.) VIN=VSS: RES IOH=- 50A: OUT type 2 (See Note 2.) IOH=- 10A: OUT type 2 (See Note 2.) IOL=10mA: OUT type 1, 2 (See Note 2.) IOL=1.8mA (See Note 4.): OUT type 1, 2 (See Note 2.) VO=13.5V: OUT type 1, 2 (See Note 2.) VO=VSS: OUT type 1, 2 (See Note 2.) RES Using circuit shown in Figure 1: VDD See Figure 2: OSC1, OSC2 Ratings min - 1.0 - 45 VDD- 1.2 VDD- 0.5 typ max 5.0 Unit A A A V V - 10 1.5 0.4 5.0 - 1.0 0.1VDD 4.0 See Figure 3 10 10 V V A A V mA ms (Note 1) Should be sufficient for oscillation amplitude when oscillator circuit shown in Figure 1 is operated at recommended constants. (Note 2) OUT type 1 : ERROR, CORRECTION, RECEIVE OUT type 2 : CLOCK OUT, DATA OUT, DATA START IN type 1 : CLOCK IN, DATA IN, CORR.SEL, CL.ED.SEL, D.S.CONTROL (Note 3) Do not use solder dip (dipping in solder tank) when mounting MFP packaged devices to circuit board. (Note 4) Except for four selectable output pins, other outputs are IOL at less than 1mA. (Note 5) Current drain with N-channel output transistors OFF, and input and output pin voltages = VDD. Figure 1. Oscillator Circuit Figure 2. Stabilization Time Table 1. Guaranteed Constants CSA4.00MG (Murata) 4MHz KBR4.0M (Kyocera) C1 C2 C1 C2 30 pF 10% 30 pF 10% 33 pF 10% 33 pF 10% 10ms or more is recommended allowing for OSC stabilizing time. Figure 3. Reset Circuit No.2890-3/8 LC7070N, 7070NM, 7071NM Pin Descriptions Signal OSC1 OSC2 CLOCK IN DATA IN CORR.SEL Pin No. 1 18 5 6 7 Input/ Output Input Output Input Input Input Function * 4MHz ceramic resonator connection. * RDS (LA2231) demodulation clock input. * RDS (LA2231) demodulation data input. * Error correction ON/OFF select. * Sets/inhibits error correction for RDS demodulation data. Input=0: No correction Input=1: Correction performed * Serial data clock polarity select. Input=0: Serial data output enabled at rising edge of output clock (data update at falling edge). Input=1: Serial data output enabled at falling edge of output clock (data update at rising edge). Note: Set at time of RES input. * Block DATA START signal control. Input=0: All block DATA START signal output. Input=1: Only #2 block DATA START signal output. * Output when receiving RDS data signal. * LOW-level during serial data output after sync detection. HIGH-level at other times. * Open drain. * Error correction enable. * LOW-level if serial data error is corrected or uncorrectable. HIGH-level if no corrections are required. * Open drain. * Error correction enable. * LOW-level if there are errors and they are uncorrectable. HIGH-level if there are no errors or correction is completed. * Open drain. * Block DATA START signal for serial data output. Open drain: LC7070N, LC7070NM Pull-up : LC7071NM * Serial data Open drain: LC7070N, LC7070NM Pull-up : LC7071NM * Serial data clock Open drain: LC7070N, LC7070NM Pull-up : LC7071NM * System reset * LOW-level for more than 4 clock cycles. H-level output H-level output H-level output State on Reset CL.ED.SEL 8 Input H-level output D.S.CONTROL 11 Input H-level output RECEIVE 10 Output H-level output CORRECTION 12 Output H-level output ERROR 13 Output H-level output DATA START 14 Output H-level output DATA OUT 15 Output H-level output CLOCK OUT RES 16 4 Output Input H-level output H-level output System Configuration No.2890-4/8 LC7070N, 7070NM, 7071NM Timing Charts & Data Format Serial Data Output 24-bit data 10ms Note: All blocks or second block-only output selectable usign D. S. CONTROL input. No.2890-5/8 LC7070N, 7070NM, 7071NM Serial Data Output Format E No errors Corrected Uncorrectable 0 0 1 F 0 1 1 CORR.SEL, D.S.CONTROL Pin Read Timing * After sync detection * States CORR. SEL and D. S. CONTROL are read at the start of each RDS demodulation data block. Four consecutive input states are then confirmed, inputs following the fourth are affected. * During sync detection. * RED demodulation data bits from LA2231 are read. Four consecutive pin states are confirmed. If all four states are the same, data are input internally. No.2890-6/8 LC7070N, 7070NM, 7071NM Serial Data Output Timing (1) * Serial data outputs from LC7070N, LC7070NM and LC7071NM are delayed one block from the RDS demodulation data from the LA2231. * When sync is detected, serial data output starts from the beginning of the next group (1 clock cycle). * ERROR and CORRECTION signal outputs are generated ahead of the serial data output. These outputs are continuous when errors are detected continuously. No.2890-7/8 LC7070N, 7070NM, 7071NM Serial Data Output Timing (2) Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products(including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be expor ted without obtaining the expor t license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only ; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of July, 2001. Specifications and information herein are subject to change without notice. PS No.2890-8/8 |
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